Background Reading

The following manual may be available at SAIT (check with your instructor). Otherwise, download a free copy of the manual below. Specific figures in the manual are referred to in this lab.

Intel 64 and IA-32 Architectures Software Developer’s Manual. Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C

https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf 

Volume 3 Chapter 3 “Protected -Mode Memory Management” and Chapter 4 “Paging”

Volume 1 Chapter 6 “ Procedure Calls and Stacks”

Problem 1 Linear Address Translation (Paging)

For details of Linear Address Translation read Intel Manual Volume-3A 4.3 32-bit Paging Use the table from page 2908 of the Intel Manual for the figure “4-2 Linear-Address Translation to a 4Kbyte Page using 32-Bit Paging” required to calculate the physical address below. 

1. Use the following python3 command line statement to randomly choose your values required to perform the Linear address translation.

python3 -c 'import random; print("col 1. row: ",random.randint(1,6)); print("col 2. row: ", random.randint(1,6)); print("col 3. row: ", random.randint(1,6)); print("col 4. row: ", random.randint(1,6)); print("col 5. row: ",random.randint(1,6));'

The output should be 5 columns col1, col2, col3, col4, col5 with respective row. The row can be different or the same for each column.

2. Attach the screen capture that demos the results after running python commands

3. Use the previous results to select from the following table the address for:

a. Linear Address:

b. Page Directory Entry:

c. CR3:

d. Page Table Entry:

e. Page :

4. On the table highlight (color or circle) the selected address for each column 

5. Use the selected addresses and check slides/notes (Module 5) to perform the linear address translation and find the respective physical address. 

Provide the physical address for:

• Page Directory (PD):

• Page Table Entry (PTE):

• Page: