Part 2. Four Bit Wide 2 x 1 Multiplexer The combinatorial logic circuit for the half adder is shown below.

Using the skills you acquired from lab_#06 develop the VHDL design for the circuit shown above The approach will be:

• Define the entity

• Define the port

• Define the architecture

The entity includes the port definition and will define the input and output signals. The architecture includes the details of how the elements are interconnected, and will include the signals connecting internal components.

For your design implement the following mapping

• Input_SEL => switch_#00 -> LED_#00

Using switch_#00

• Make Input_SEL => 0=>

• Make Input_SEL => 1=>

When you are done, program the board and complete the truth table above.

Is it what you would expect?